CERTIFIED INTEL FPGA PROGRAMMER

ASSOC. PROF. IR AHMAD JAIS ALIAS

SENSOR TECHNOLOGY SPECIALIST

5

days

OCT 25 - 29

dates

RM 3900

fee

MODE OF DELIVERY

HRDF
CLAIMABLE​

Apply Now:

Who shouldattend

  • Researchers looking into implementing design on FPGA.
  • Students planning to be Integrated Circuit Design/Hardware/System Design Engineers.
  • Operation Managers.
  • Business Owners.
  • System Design Engineers.
  • Hardware Engineers.
  • Integrated Circuit Design Engineers.

MODULE 1:

FOUNDATIONS OF INTEL, QUARTUS & PRIME SOFTWARE

OVERVIEW:

Learn to use the Intel® Quartus® Prime software to develop an FPGA design from initial design to device programming. Participant will create anew project, input new or existing design files, and compile the project.

Participant will learn how to search for compilation information, use settings and assignments to adjust the results of compilation, and manage I/O related assignments.

SKILLS YOU WILL GAIN

Use the Intel® Quartus® software to develop an FP design from initial design to device programming.

TOOLS NEEDED

Intel Quartus Prime Lite Edition 20.1.1

MODULE 2:

INTRODUCTION TO VERILOG HDL

OVERVIEW:

A general introduction to the Verilog language and its use in programmable logic design, covering the basic constructs used in both the simulation and synthesis environments.

Gain basic understanding of the Verilog module, data types, operators and assignment statements needed to begin creating your own designs, using both behavioral and structural approaches.

SKILLS YOU WILL GAIN

Create the Verilog language in programmable logic design, including the basic contruct used in both simulation andsynthesis environment.

TOOLS NEEDED

  • Intel Quartus Prime Lite Edition 20.1.1
  • ModelSim Intel FPGA Edition

MODULE 3:

ADVANCED VERILOG HDL DESIGNTECHNIQUES

OVERVIEW:

Learn efficient coding techniques for writing synthesizable Verilog for Intel® FPGAs. Gain experience in behavioral and structural coding while learning how to effectively write common logic functions including registers, memory, and arithmetic functions.

Also learn how to parameterize your Verilog design, increasing flexibility and reusability. An introduction to test benches and the constructs used when building them.

SKILLS YOU WILL GAIN

Design synthesizable Verilog for Intel® FPGA using Quartus Prime software and the ModelSim for Intel® FPGA Edition software.

TOOLS NEEDED

  • Intel Quartus Prime Lite Edition 20.1.1
  • ModelSim Intel FPGA Edition

CERTIFICATION

Awarded by University Malaysia of Computer Science and Engineering (UNIMY) 

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